ASIC Physical Design and Timing Engineer - New College Grad 2026 — Nvidia | cvGO!

Nvidia · US, CA, Santa Clara · Office

### About the Role ASIC Physical Design and Timing Engineer for Nvidia's 2026 new college graduate program. Focus on AI, graphics, and HPC chip development. ### Responsibilities - Perform synthesis, placement, routing, and timing optimization for complex ASIC blocks. - Analyze and close timing using