RTL Designer (ASIC) | cvGO!

Минск, проспект Победителей, 106 · Office

### About the Role Seeking an RTL Designer (ASIC) for engineering projects. ### Responsibilities - Design and develop RTL for ASIC projects. ### Requirements - Experience in RTL design for ASICs. - Proficiency in hardware description languages (Verilog/VHDL). - Knowledge of ASIC design flow and tool